Oberon System on the FPGA (was Oberon-1 or Oberon-2?)
Chris:
I am a software guy too, and seeing for example a Banana Pi for less than $40 I don't get it. Whats wrong with these boards?
Nothing is wrong. Very nice boards for their purpose. However, we are not using these. So what are we using? Please have a look at our web page www.skutek.com. Please look at the photos of the boards that we have developed. It will become obvious why all these very nice little boards are not on our radar.
Where is the advantage of the FPGA approach.
In a nutshell, the FPGA allows to build your own System On Chip (SoC) that can serve your application. Please have a look at the wonderful books by Pong P. Chu "Embedded SoPC Design with Nios II Processor". (There are two versions, one with Verilog and one with VHDL). In these books you will find how you can build your own SoC. Do you need to build your own SoC? If you are doing what we are doing then the answer is yes. In fact, every FPGA configuration, with a processor or without, is a SoC. I am now interested in adding a soft core to our designs.
Why? I really don't understand. From the recent discussion here I remember the FPGA board used is out of production.
There are other boards. It is a piece of cake to roll out your own board, at least with our kind of experience.
Replacement is not available with the same features.
Nexys-4 has all the features. One can also design one's own board.
Ethernet or USB is not available and most likely never will.
Nexys-4 has the Ethernet. There are tons of ways to connect the Ethernet PHY to the FPGA. We have done this and we achieved full GbE Ethernet wire speed with our custom firmware running UDP packets via Gigabit PHY. In fact, our next data acquisition project will be doing just that. So, never say never while talking to the HW person. We can do anything. The question is "can you program the hardware that we developed". In particular, "can anybody port the OP2 compiler to RISC5, or to make the Wirth compiler understand Oberon-2"? Regards, Wojtek
On Thu, 30 Oct 2014 10:35:14 -0400, skulski@pas.rochester.edu wrote:
So, never say never while talking to the HW person. We can do anything. The question is "can you program the hardware that we developed". In particular, "can anybody port the OP2 compiler to RISC5, or to make the Wirth compiler understand Oberon-2"?
I am sure it can be done, but I am also sure that it will be difficult to motivate anybody to do it. I see a chicken and egg problem here. Unless there is a board available, why would anyone write a compiler for practically non existing hardware. For me at least, doing my own board is not an option. Nothing against the recommended book, but for it's price I can have two Banana Pis at my doorstep tomorrow and start coding immediately if i wanted to. I understand that for your very special application the FPGA is the way to go. From what I see at your webpage you have done some impressive hardware. What I still not understand is: what is the essential benefit of the Oberon System/Compiler in your case. You have ucLinux (I believe) running and 600 MHz CPU or so; compared to that the RISC5 is a small toy running at 25 MHz, I think. It is lacking a lot of features from the core like 8 and 16 Bit arithmetics to the peripherals like ethernet, color, etc. and the device drivers necessary. Adding all this, probably enhancing the instruction set and bringing this up to reasonable speed, i wonder is this still a "piece of cake"? Greetings, Christian
On 10/30/14 15:35, skulski@pas.rochester.edu wrote:
Do you need to build your own SoC? If you are doing what we are doing then the answer is yes. In fact, every FPGA configuration, with a processor or without, is a SoC. I am now interested in adding a soft core to our designs.
Right, so you want to have a processor on your board and you want to have an Oberon-2 compiler for it. So, why not "implement" a processor for which an Oberon-2 compiler already exists? I think, MIPS would be a good candidate because it has a simple "classic" MIPS instruction set, and OP2 creator Regis Crelier himself has written a code generator for it. Based on my own experiences with creating a backend for OP2 I'd say that it is a semester's work ("piece of cake") only if you are a very fast hacker, for the following reasons: - The OP2 source code is difficult to understand. For example, it uses intermediate data structures which have been optimized for high efficiency, not for comprehensibility, using record fields with generic names, which are reused for different purposes, instead of extended records. - You have to create your own register assignment/management which can be very tricky, especially with explicitly passed run-time type descriptors, open arrays etc. - Creating code even for simple operators and standard functions can be surprisingly complicated if you want to create reasonably efficient code: If, for example, your processor supports only 5 different addressing modes, you have to create up to 25 different instructions sequences for simple operations like integer subtraction. Even more complications are possible for efficient support of the different Oberon-2 integer types (SHORTINT, INTEGER, and LONGINT). - Finally, let's face it, development in Oberon-2 is a lot less efficient compared to, for example, development within modern Java development environments, due to lack of good editors and debuggers.
So, never say never while talking to the HW person. We can do anything.
This is my favorite quote of the month. :) Richard
participants (3)
-
chris -
Richard Hable -
skulski＠pas.rochester.edu