Re: [Oberon] WITH removal in Oberon-07
Date: Thu, 21 Feb 2013 22:52:05 +0100 From: "Frans-Pieter Vonck" <fp@vonck.nl> Subject: Re: [Oberon] WITH removal in Oberon-07
Hi Frans-Pieter,
i watched your presentation at MEDIA OberonDay2011. Am I right that you made an ARM emulator first.
No. The virtual machine is RISC, as in Prof. Wirth's Compiler Construction book (published in English in 1996 and updated on his home page http://www.inf.ethz.ch/personal/wirth/).
And did you use this emulator to ran Oberon System07 on top of it?
It's not called System07, but it's basically the original system in the Project Oberon book, modified to compile under Oberon-07, run inside a RISC virtual machine executing on a bare-metal PC.
You showed a Spartan FPGA. I scanned through the Verilog ARM code. But that seems a to big leap to me.
I don't know what Verilog code you are referring to here. The Spartan-3 board only has 500K gates and 1MB of external static RAM, so it's much smaller and simpler than a typical ARM system. But ideal for Oberon.
Do you think it is possible to run [The Oberon System, compiled in Oberon-07] on an of the shelf board with a Cortex M3 processor?
I don't see why not, but most small ARM boards don't have a video framebuffer. The Raspberry Pi does, but it's a complicated board, as I've said before. The Oberon inner core (Kernel, FileDir, Files, Modules) and even the text system do not actually require a framebuffer display, so you could build a hybrid system. Using a simple FPGA board allows us to avoid the vast and irrelevant complexity inherent with most ARM System-on-Chip (SoC) systems; but since field-programmable gate arrays are so flexible, they will never be as cheap or as fast as a dedicated ARM. That's life. :) HTH Paul
I don't know what Verilog code you are referring to here. It is the code at the and of Compiler Construction version 2011 "Appendix D. Der RISC-Prozessor in Verilog"
I don't see why not, but most small ARM boards don't have a video framebuffer. The Raspberry Pi does, but it's a complicated board, as I've said before. Yes I've followed that discussion. A few years ago I went to a presentation of Andy Tanenbaum about Minix3. He asked the audience to help him with porting Minix to ARM. He even had a Google Scholarship for it. Also for Minix there is still no USB library available. Andy demonstrated us how a not responding proces had to be handled. It can be paraphrased as "Fifteen milisecs to comply, otherwise, shoot the....." Pointing an index finger to the crowd. How would you describe the way an oberon loop handles a endless loop in a task?
The Oberon inner core (Kernel, FileDir, Files, Modules) and even the text system do not actually require a framebuffer display, so you could build a hybrid system. There are some vga hacks around for micro controllers, but the fonts are rather coarse. It an be a nice demo project to scale up from the LCD or
For microcontrollers usb harddrives, usb mouse and usb keyboards are not really necessary. Possibly old ps/2 mouse and keyboard can be used easily. However connect to the microcontroller from a native Oberon System seems thrilling enough to me. the good old Leds. Requires some solid programming skills to setup the PWM for the syncing, though.
Using a simple FPGA board allows us to avoid the vast and irrelevant complexity inherent with most ARM System-on-Chip (SoC) systems Just curiuos, did you program a graphics module (vga) in your FPGA board?
Greets, F.P.
HTH Paul
-- Oberon@lists.inf.ethz.ch mailing list for ETH Oberon and related systems https://lists.inf.ethz.ch/mailman/listinfo/oberon
Hi Frans-Pieter,
How would you describe the way an oberon loop handles a endless loop in a task?
The Ceres workstation had a special key which interrupted the system and returned control to Oberon.Loop. It was detected in the keyboard interrupt handler, Input.KBINT, and causes a Trap(24). See Project Oberon Ch. 9.2, pp.260-261 (PDF p.208).
Just curiuos, did you program a graphics module (vga) in your FPGA board?
Yes, it's 1024 x 768 x 1bit, using 96KB of the external 1MB SRAM. Cheers, Paul
The Ceres workstation had a special key which interrupted the system and returned control to Oberon.Loop. It was detected in the keyboard interrupt handler, Input.KBINT, and causes a Trap(24). See Project Oberon Ch. 9.2, pp.260-261 (PDF p.208). This was not what I meant. On page 33, Project Oberon"[..] unsafe background tasks are removed from the ring of ready tasks before reactivation, and are installed again only after successful return. Consequently unsafe tasks are eliminated automatically after failing. This is an effective precaution against cascades of repeated failures."
I find that intriguing - what is an unsafe background task? The question that comes to my mind - how did they verify the operating system. The answer I expect to get from behind the Alps is - "by elegant design".* Or is there something else? Can it be found in the brains of Olga or Horla ? Greets, Frans-Pieter *I have three Bernina's from the sixties and seventies and the they still sew perfect stitches. Prices of these machines were in the sixties 700 guilders. Back then the average income was 500 guilders a month. The average income in the Netherlands nowadays is 33.000 euro. That means, if you equal guilders with euros, a Bernina sewing machine now would have cost 3850 euro. Imagine, buying something that is more than a month worth of salery? In the sixties, a domestic machine. Now, that must be..... a flatscreen? You can find a sixties Bernina's on the secondhand market here for around 150 euro. And prices are rising.
From: Frans-Pieter Vonck [mailto:fp@vonck.nl]
The Ceres workstation had a special key which interrupted the system and returned control to Oberon.Loop. It was detected in the keyboard interrupt handler, Input.KBINT, and causes a Trap(24). See Project Oberon Ch. 9.2, pp.260-261 (PDF p.208). This was not what I meant. On page 33, Project Oberon"[..] unsafe background tasks are removed from the ring of ready tasks before reactivation, and are installed again only after successful return. Consequently unsafe tasks are eliminated automatically after failing. This is an effective precaution against cascades of repeated failures."
I find that intriguing - what is an unsafe background task?
see page 29. B
The question that comes to my mind - how did they verify the operating system. The answer I expect to get from behind the Alps is - "by elegant design".* Or is there something else? Can it be found in the brains of Olga or Horla ?
Greets, Frans-Pieter
*I have three Bernina's from the sixties and seventies and the they still sew perfect stitches. Prices of these machines were in the sixties 700 guilders. Back then the average income was 500 guilders a month. The average income in the Netherlands nowadays is 33.000 euro. That means, if you equal guilders with euros, a Bernina sewing machine now would have cost 3850 euro. Imagine, buying something that is more than a month worth of salery? In the sixties, a domestic machine. Now, that must be..... a flatscreen? You can find a sixties Bernina's on the secondhand market here for around 150 euro. And prices are rising.
-- Oberon@lists.inf.ethz.ch mailing list for ETH Oberon and related systems https://lists.inf.ethz.ch/mailman/listinfo/oberon
On Sun, Feb 24, 2013 at 7:56 AM, Paul Reed <paulreed@paddedcell.com> wrote:
Date: Thu, 21 Feb 2013 22:52:05 +0100 From: "Frans-Pieter Vonck" <fp@vonck.nl> Subject: Re: [Oberon] WITH removal in Oberon-07
Hi Frans-Pieter,
i watched your presentation at MEDIA OberonDay2011. Am I right that you made an ARM emulator first.
No. The virtual machine is RISC, as in Prof. Wirth's Compiler Construction book (published in English in 1996 and updated on his home page http://www.inf.ethz.ch/personal/wirth/).
Hey Paul, Wirth mentioned your virtual machine again at his birthday symposium. Is it publicly available? No pressure. :) And thanks for all your work. -Jack
participants (4)
-
Bob Walkden -
Frans-Pieter Vonck -
Jack Johnson -
Paul Reed