Date: Thu, 21 Feb 2013 22:52:05 +0100 From: "Frans-Pieter Vonck" <fp@vonck.nl> Subject: Re: [Oberon] WITH removal in Oberon-07
Hi Frans-Pieter,
i watched your presentation at MEDIA OberonDay2011. Am I right that you made an ARM emulator first.
No. The virtual machine is RISC, as in Prof. Wirth's Compiler Construction book (published in English in 1996 and updated on his home page http://www.inf.ethz.ch/personal/wirth/).
And did you use this emulator to ran Oberon System07 on top of it?
It's not called System07, but it's basically the original system in the Project Oberon book, modified to compile under Oberon-07, run inside a RISC virtual machine executing on a bare-metal PC.
You showed a Spartan FPGA. I scanned through the Verilog ARM code. But that seems a to big leap to me.
I don't know what Verilog code you are referring to here. The Spartan-3 board only has 500K gates and 1MB of external static RAM, so it's much smaller and simpler than a typical ARM system. But ideal for Oberon.
Do you think it is possible to run [The Oberon System, compiled in Oberon-07] on an of the shelf board with a Cortex M3 processor?
I don't see why not, but most small ARM boards don't have a video framebuffer. The Raspberry Pi does, but it's a complicated board, as I've said before. The Oberon inner core (Kernel, FileDir, Files, Modules) and even the text system do not actually require a framebuffer display, so you could build a hybrid system. Using a simple FPGA board allows us to avoid the vast and irrelevant complexity inherent with most ARM System-on-Chip (SoC) systems; but since field-programmable gate arrays are so flexible, they will never be as cheap or as fast as a dedicated ARM. That's life. :) HTH Paul