January 2014 - Oberon - mailman3.inf.ethz.ch

Boot procedure FPGA Oberon
by greim 23 Jan '14

23 Jan '14

Regarding Boot procedure FPGA Oberon I have just seen that Nicklaus Wirth has totally reviced some chapters of the documentation (my browser cache has cheated me). Also the boot procedure is now different, its now using the RS-232 interface. The Verilog files on his web site seems to be still the old ones. Bit I will watch the web site, waiting for further news... Markus Greim

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Re: [Oberon] FPGA Oberon prom.mem / SD-card formating
by peasthope＠shaw.ca 21 Jan '14

21 Jan '14

From: greim <greim(a)schleibinger.com> Date: Tue, 21 Jan 2014 13:48:25 +0100 > My idea is to run an old native Oberon on a PC with floppy disk > disk and then copy this floppy physically to the SD card. Griem, do you intend that within Native Oberon, a driver for the SDHC be made? Will you use an SDHC adapter connected to the PCI bus? An adapter connected through USB? Regards, ... Peter E. -- 123456789 123456789 123456789 123456789 123456789 123456789 123456789 12 Tel +1 360 639 0202 http://carnot.yi.org/ **** New address Bcc: peter at easthope. ca ****

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FPGA Oberon prom.mem / SD-card formating
by greim 21 Jan '14

21 Jan '14

Hi Chris Glur Hi Chris Burrows, > From: eas lab <lab.eas(a)gmail.com> > Subject: Re: [Oberon] FPGA Oberon - Bootloader - SD card file format > To: greim(a)schleibinger.com, ETH Oberon and related systems > <oberon(a)lists.inf.ethz.ch> > Message-ID: > <CAN3-DLEodh-_rfjnCqBsYYz6jDga+fv1REQRiYj+sXXgsGfjZg(a)mail.gmail.com> > Content-Type: text/plain; charset=ISO-8859-1 > > ]- bootlaoder: > ] i am just trying to build up the FPGA Oberon system, shown in Prof. > ] Wirths latest Oberon paper (my Ariel project..). > Paste the URL. which URL, the URL of my project? There isn't any yet. But if somebody is interested in, i will publish a Wiki. Thats the file with the missing link: <http://www.inf.ethz.ch/personal/wirth/ProjectOberon/SourcesVerilog/PROM.v> ------------------------------------------------------------------------ `timescale 1ns / 1ps // 32-bit PROM initialised from hex file PDR 23.12.13 module PROM (input clk, input [8:0] adr, output reg [31:0] data); reg [31:0] mem [511: 0]; initial $readmemh("../prom.mem", mem); ^^^^^^^^^^^^^^^^^ always @(posedge clk) data <= mem[adr]; endmodule ---------------------------------------------------------- you may see a requested prom.mem that i can't find > > The file format is described in 'The file System' - Chapter 7 of the Dec > 2013 Revision of Project Oberon. The bootloader is decribed in Chapter 14. > The source code of the SD card drivers is in Kernel.mod i have noticed that the bootloader mechanism is described shortly at chapter 14 page 12 (see above) but the code for the bootloader rom is missing. I have^also seen the description of the file system format now, thanks. But in practice i have to write a SD card without the FPGA Oberon running yet. (The chicken - egg problem ;-) ) My idea is to run an old native Oberon on a PC with floppy disk and then copy this floppy physically to the SD card. Has the file format ever changed? Any other/better idea? Regards Markus Greim P.S. I have seen that Prof. Wirth will present his FPGA Oberon system on his 80. birthday conference. Unfortunately the conference is overbooked :-( See http://wirth-symposium.ethz.ch/ I have noticed it too late, otherwise i would be there! > > Regards, > Chris > > Chris Burrows > CFB Software > Astrobe: Oberon for ARM and Cortex-M3 > http://www.astrobe.com > > > > > ------------------------------ > > -- > Oberon(a)lists.inf.ethz.ch mailing list for ETH Oberon and related systems > https://lists.inf.ethz.ch/mailman/listinfo/oberon > > > End of Oberon Digest, Vol 116, Issue 10 > *************************************** >

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FPGA Oberon - Bootloader - SD card file format
by greim 20 Jan '14

20 Jan '14

Hi, - bootlaoder: i am just trying to build up the FPGA Oberon system, shown in Prof. Wirths latest Oberon paper (my Ariel project..). The Spartan 3 board + ISE etc. is running so far. When runny ISE i have seen that the file prom.mem is missing (located in Prom.v searching for ../prom.mem) . As i understood the Verilog code so far, ist seems to be the bootloader code. - SD card format its not clear in which format / file system .. the Oberon files should be stored onto the SD card, is there any file format description? - the right platform for this topic? Is this mailing list the right place for this kond of questions? or better comp.lang.oberon, or any web forum (i don't like them..) Best Regards Markus Greim

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FPGA Oberon
by greim 14 Jan '14

14 Jan '14

Hi, 1. i like to test the new Oberon 2013 (to keep at Shakespeare i personally call it Ariel ;-) , even if i know that the Moon Oberon is responsible for the name) I have got a Xilinx Fpga Spartan-3 XC3S200FT256 kit here. is the -200 big enough to realize the System, or do i need the -1000 system? Regards Markus Greim

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Can ETHO be ported to ARM?
by eas lab 13 Jan '14

13 Jan '14

No, not the <language>, but the unique interface of S3/V4. What matters is the human-interface. That's what determines your productivety [maximum gain for minimum pain]. Not needing to switch between awkward F-keys and the screen, and having easy access to multiple text-files together, and each text-view having <what the bottle does, written on the bottle, instead of in the filing cabinet>. Porting ETHO to linux [both S3 & V4] was a killer app:. you get the Inet capability of *nix together with the superior human-interface of ETHO, plus you can view *pdf, LaTex..etc. on the same screen. For tricky problems, needing simultaneous views of: email/s, USEnet/s, your test-logs EHO is unbeaten, especially with the text colouring facilities, which help extract the meaning of difficult explanations. Because opeing/closing a new ETHO-for-linux takes a second, it's viable to have several copies running in the various dirs, which are handling current problems. Real life doesn't allow fixing one problem at a time. Can those of us who want to escape the WinTel monopoly, hope to use ARM based CPUs with an ETHO-like interface, by a porting of the existing/proven code? == Chris Glur. PS. LNO's inability to easily navigate the dir-tree, limits its utility.

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Functional composition?
by eas lab 12 Jan '14

12 Jan '14

Modules are marvelous to hide clutter, and reduce the human memory load. But functional-composition goes further: there's no arguments type & order to remember; there's only "it". If the task works up to stage N, you don't need to remember/understand previous stages, other than the interface between N & N+1. ETHO has a remarkable little-known application <a scheme based drawing program>, which built scheme on ETHO and then the drawing program on scheme. What about functional-composition abilities for ETHO, by a simular approach? I never managed to use "layla?" because of the documentaion. Was the contributed-ap: toy, going towards functional-composition? Here's a taste of what FC can do:- Today I had a serious problem, to find the text-file of the TextToSpeech, which which 'mentioned' some legal matter. Several approaches of FC failed; eg: `find` FileSubTree DaysOld <containing an unusual text-string>. Finally `lsof | grep wily | grep egal` gave me 4 files, and success. Don't be distracted by unfamiliar syntax. it's just a chain of 3 commands: 1=list the table of open files; 2=but only the lines containing "wily" [which I knew was involved]; 3=and only the lines containing "egal" [since that would be in the path]. Just to give an idea of the magnitude of data that such simple FC can handle without writing/compiling code: `lsof | wc -l` = 10447 <-- List open Files & count number of lines in table! I've got 16 workspaces with an average of 5 terminal each, from work accumulated over 2 weeks. So, "lots of books are open". A further example shows how reformatting cited text in eg. ">> badly line-broken > USEnet articles ..." is easily achived 1. replace each EndOfLine with <space> 2. fold the text at word-boundries at eg. '72<LineLen' 3. prepend required eg. ">>>" to each line. IMO the various CF should be just pulled-off-a-menu: an extention of N-O's Tools. ==Chris Glur.

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Re: [Oberon] Oberon Digest, Vol 115, Issue 15
by Luca Boasso 11 Jan '14

11 Jan '14

This is a really nice Christmas present indeed! I'm planning to buy a Spartan 3 starter kit to try it out. Does anybody know which model work best? There are several model available (Spartan-3AN, Spartan-3E, ...) http://www.xilinx.com/products/boards_kits/spartan.htm I was reading chapter "14 Building and maintenance tools" to understand how to boot and configure the FPGA. It looks like the verilog source files(RISCTop.v, RISC.v, Multiplier.v, Divider.v, FPA dder.v. FP.Multiplier.v, FP.Divider.v, dbram32.v, RS232R.v, RS232T.v, SPI.v, XGS.v, PS2.v, RISC.ucf ) are missing from the website, and also the Oberon0 module. Do you know where I can find those files? Thank you Luca On Fri, Dec 20, 2013 at 1:00 PM, <oberon-request(a)lists.inf.ethz.ch> wrote: > Send Oberon mailing list submissions to > oberon(a)lists.inf.ethz.ch > > To subscribe or unsubscribe via the World Wide Web, visit > https://lists.inf.ethz.ch/mailman/listinfo/oberon > or, via email, send a message with subject or body 'help' to > oberon-request(a)lists.inf.ethz.ch > > You can reach the person managing the list at > oberon-owner(a)lists.inf.ethz.ch > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of Oberon digest..." > > > Today's Topics: > > 1. Project Oberon: New Edition (Treutwein Bernhard) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Fri, 20 Dec 2013 09:07:14 +0000 > From: Treutwein Bernhard > <Bernhard.Treutwein(a)Verwaltung.Uni-Muenchen.DE> > Subject: [Oberon] Project Oberon: New Edition > To: "'oberon(a)lists.inf.ethz.ch'" <oberon(a)lists.inf.ethz.ch> > Message-ID: > <78A8BD6765DCF048A628A51C3FBD1D761887788C(a)MXS2.zuv.uni-muenchen.de> > Content-Type: text/plain; charset="us-ascii" > > Xmas surprise: Project Oberon is approaching a new edition, see http://www.inf.ethz.ch/personal/wirth/ProjectOberon/index.html > especially an update of the hardware FPGA instead of NS32000. > -- > Bernhard > > > > ------------------------------ > > -- > Oberon(a)lists.inf.ethz.ch mailing list for ETH Oberon and related systems > https://lists.inf.ethz.ch/mailman/listinfo/oberon > > > End of Oberon Digest, Vol 115, Issue 15 > ***************************************

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Oberon / Lola -> VHDL / Verilog Hardware Description Language
by greim 09 Jan '14

09 Jan '14

Hi, many thanks to your comments to my suggestions, regarding Oberon as HDI. Some remarks: 1* theoretical, you may write a compiler that is translation an Oberon style HDL to the configuration file for any FPGA. In practice this would need 1000 man-year i guess. So some Oberon -> (VHDL or Verilog) compiler would by the only practical way. Chisel as far as i remember has less the 10.000 lines of code. 2* many thanks for the hint to LOLA. As far as i could download the whitepaper its in principle what i suggested. Its designed in 1995 for standard GALs. Actual FPGAs are much more complex. So a LOLA2 working as described in 1* would be one possible solution i guess. Regards Markus Greim

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undefined record field when compiling in NO.
by peasthope＠shaw.ca 09 Jan '14

09 Jan '14

In the alpha release of NO, the compiler applied to MODULE Test; IMPORT ConfigInput; PROCEDURE Frame(F: ConfigInput.Frame); VAR x: INTEGER; BEGIN x := F.x END Frame; BEGIN END Test. reports compiling Test pos 105 err 83 undefined record field . This is in ConfigInput. TYPE Frame* = POINTER TO RECORD (Display.Frame) keys: SET; x, y: INTEGER; text: Texts.Text END; So F.x in Test should be legitimate. Can anyone explain why the compiler complained? Thanks, ... Peter E. -- 123456789 123456789 123456789 123456789 123456789 123456789 123456789 12 Tel +13606390202 Bcc: peasthope at shaw.ca http://carnot.yi.org/ "http://members.shaw.ca/peasthope/index.html#Itinerary "

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